Senior Verification Engineers to Haifa

Senior Verification Engineers to Haifa

Education: Electrical Engineering/Computer science faculty

 8+ years of related work experience
 Experience in digital design verification.
 Hands-on experience in modern verification environments and tools:
1. Identifying test points and coverage points
2. Creating constraint random testbenches
3. Hardware Verification Languages and methodologies
1. Advantage to SystemVerilog
2. Advantage to OVM/UVM
4. Scripting languages
5. Assertions
6. Formal verification
 Understanding of HW SW partition and system level considerations.
 Ability to work in a team and to work in the Lab in order to assist in debugging the designs.