דרושים פיתוח חומרה

Senior Verification Engineers to Haifa

Education: Electrical Engineering/Computer science faculty

 8+ years of related work experience
 Experience in digital design verification.
 Hands-on experience in modern verification environments and tools:
1. Identifying test points and coverage points
2. Creating constraint random testbenches
3. Hardware Verification Languages and methodologies
1. Advantage to SystemVerilog
2. Advantage to OVM/UVM
4. Scripting languages
5. Assertions
6. Formal verification
 Understanding of HW SW partition and system level considerations.
 Ability to work in a team and to work in the Lab in order to assist in debugging the designs.

• Power Supply design and development
• Power Supply integration
• Analog Layout design
• Test procedures and protocol writing
• Design verifications

• B.Sc in Electrical Engineering
• At least 2 years of experience in analog/ power circuit
• Experience with AC/DC DC/DC topology and analog circuit
• Experience with OrCad or PSpice – Must
• Understanding with EMC (Electro Magnetics Conductive)
• Skilled with board's test and debug at power circuit
• Experience with LAB equipments
• Electronics components knowledge
• Ability to locate and fix board problems in components level

Verification engineer that will take a major part in verification effort of first-generation wireless communications IC, Responsible for blocks and sub-chips verification environments , which includes environment architecture, testing plan definition, environment development and simulation.

B.Sc. in Computer/Electrical engineering
More than 7 years of experience in verification
Proven experience in entire verification flow: verification environment planning, environment coding, coverage and testing
Proven coding experience in SystemVerilog using VMM methodology or Specman (SystemVerilog experience – strong advantage)
Participate in verification infrastructure planning and coding
Scripting capabilities (Perl) - advantage