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A validation and Verification system engineer is a multidisciplinary system engineer, who is part of the team of system engineers, who are responsible for several different issues:
Determining the concept of validation and validation and the program of functional combinations.
Defining the methods and verification level of each requirement, as part of the verification matrix, attached to the requirements specification of the project chief engineer.
Defining the required test systems, laboratories, and simulations and the means of decoding for the benefit of verification processes
Definition and management of the integration processes in the laboratories, including - prioritization, execution of lectures, initial decoding, distribution to the decoding factors, etc.
Bachelor's degree in Software Engineering / Computer Science / Aeronautics.
Master's degree in systems engineering - an advantage.
Experience in systems engineering - at least 3 years.
Experience in developing digital simulation/integration laboratories and software approval - an advantage.
Experience in defining and leading system software testing - an advantage.