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You will be a part of a global team that design the next generation SSD controllers
You will need to understand the SoC requirements, integrate IPs into the SoC and provide SoC solutions for the features that are out of scope of existing IPs.
You will be required to see the bigger picture and system level understanding
You will be required to support functional teams in finding solutions for SoC related issues pre and post silicon
Bachelor's degree in Electrical Engineering or Computer Science.
5 years+ experience in ASIC design
Excellent knowledge of Verilog/SystemVerilog
Knowledge of bus protocols like AXI,AMBA,BVSI
Experience in working in ARC CPUs environment - advantage
Knowledge of LINT/CDC – advantage
Knowledge of DFT aspects - advantage
Excellent team work capabilities
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