Verification Engineer

תיאור משרה

Collaborate with architecture and design teams to define and implement comprehensive testcases for NN processor and SoC blocks and flows.
Maintain, enhance, and scale the UVM?based verification environment to support efficient and robust verification.
Own end?to?end verification of system flows to ensure the design is fully functional, correct, and meets performance expectations.
Drive root?cause analysis and debug across RTL, testbench, and system layers to ensure high?quality design closure.
Define, track, and close functional and performance coverage to guarantee verification completeness.
Continuously improve verification methodologies, automation, and workflows to increase productivity and coverage efficiency.