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דרושים מהנדס / הנדסאי ASIC
מהנדס/ת פיתוח FPGA/ASIC
לפני 6 שעותהגש/י מועמדות
רפאלפיתוח תכן לוגי לרכיבי FPGA המתקדמים ביותר ללב המערכות של רפאל.
הגדרות ארכיטקטורה דיגיטלית, תכנון ויישום של עיבוד אות בקצבים גבוהים, תכנון וישום של ממשקי תקשורת מהירה ובקרות מורכבות.
מעורבות משלבים ראשוניים של הגדרת הפרויקט ועד להוכחת התכן במערכת הסופית.
הגדרות ארכיטקטורה דיגיטלית, תכנון ויישום של עיבוד אות בקצבים גבוהים, תכנון וישום של ממשקי תקשורת מהירה ובקרות מורכבות.
מעורבות משלבים ראשוניים של הגדרת הפרויקט ועד להוכחת התכן במערכת הסופית.
דרישות התפקיד:בוגרי תואר בהנדסת חשמל/ הנדסת מחשבים BSc/MSc
ניסיון של שלוש שנים לפחות בפיתוח תכן לוגי (ASIC/FPGA)
הכרת שפות תיאור חומרה לעומק (VHDL/Verilog/system verilog )
כתיבת סביבת בדיקה ועבודה בסביבת ווריפיקציה – (modelsim/questasim)
ניסיון עם רכיבי Intel (Altera)/Xilinx העדכניים ביותר ושליטה בכלי הפיתוח
ניסיון עם High speed Transceivers – יתרון
ניסיון של שלוש שנים לפחות בפיתוח תכן לוגי (ASIC/FPGA)
הכרת שפות תיאור חומרה לעומק (VHDL/Verilog/system verilog )
כתיבת סביבת בדיקה ועבודה בסביבת ווריפיקציה – (modelsim/questasim)
ניסיון עם רכיבי Intel (Altera)/Xilinx העדכניים ביותר ושליטה בכלי הפיתוח
ניסיון עם High speed Transceivers – יתרון
שנות נסיון:3-4 שנים
איזורים:צפון
תחומים:מהנדס / הנדסאי FPGA, מהנדס / הנדסאי ASIC, פיתוח חומרה
היקף המשרה:משרה מלאה
משרות נוספות וכל מה שצריך לדעת על:רפאל
Hardware Power Engineer
לפני 6 שעותשלח קורות חייםהוסף לסל
solaredgeSolarEdge is a top global leader in smart energy technology. The company's broad range of products encompasses intelligent inverter and storage systems, revolutionary EV charger, smart energy management solutions and more.
SolarEdge's power design teams play a crucial role in creating new innovative solutions, owning the process from design & development up to implementation and manufacturing.
We are looking for an experienced and diligent individual to join the team.
What will you be doing:
Taking part in the development of the company’s flagship products
Responsibility for the development from the design stage to the final product, including all tests necessary to deliver the product to mass production (electronic tests, thermal tests, EMI tests…).
Working with other teams inside the Hardware division and outside of it (such as the Mechanical department, Software and more)
SolarEdge's power design teams play a crucial role in creating new innovative solutions, owning the process from design & development up to implementation and manufacturing.
We are looking for an experienced and diligent individual to join the team.
What will you be doing:
Taking part in the development of the company’s flagship products
Responsibility for the development from the design stage to the final product, including all tests necessary to deliver the product to mass production (electronic tests, thermal tests, EMI tests…).
Working with other teams inside the Hardware division and outside of it (such as the Mechanical department, Software and more)
Job Requirements:B.Sc. in Electrical engineering
At least 1 year experience in power electronics
Knowledge in Analog circuits and Op Amps behavior – Must.
Experience of designing Flyback DC2DC converters
Proven experience working with lab equipment such as Spectrum, Scope, Electronic Loads act
1+years of experience in circuit design and HW board design – Advantage
Knowledge of DC2DC converter topologies such as Buck, Boost, Flyback and forward – Advantage
Knowledge in magnetic design – Advantage
Knowledge in Orcad, Visio and Pspice – Advantage
Feedback control loop knowledge – Advantage
Knowledge in EMI requirements and design – Advantage
Knowledge in power layout design – Advantage
Knowledge in inverters topologies and systems is a plus – Advantage
At least 1 year experience in power electronics
Knowledge in Analog circuits and Op Amps behavior – Must.
Experience of designing Flyback DC2DC converters
Proven experience working with lab equipment such as Spectrum, Scope, Electronic Loads act
1+years of experience in circuit design and HW board design – Advantage
Knowledge of DC2DC converter topologies such as Buck, Boost, Flyback and forward – Advantage
Knowledge in magnetic design – Advantage
Knowledge in Orcad, Visio and Pspice – Advantage
Feedback control loop knowledge – Advantage
Knowledge in EMI requirements and design – Advantage
Knowledge in power layout design – Advantage
Knowledge in inverters topologies and systems is a plus – Advantage
Required Experience:1-2 שנים
Locations:מרכז, שרון
Location:הרצליה
Sub Categories:מהנדס אנלוגי, מהנדס / הנדסאי ASIC, מהנדס אלקטרוניקה
Job Scopes:משרה מלאה
For more jobs and additional info about:solaredge
Architectural Exploration and Modeling student
לפני 23 שעותשלח קורות חייםהוסף לסל
MarvellThe requisition is for an intern position in the switching architecture group
• We are developing innovative architectures that require deep architecture exploration.
• Simulation models are the main tools for exploring new architectures, validating them in context of the device level and at system level. At device level the simulations models provide means for analysis of Architectural and uArchitectural alternatives, SW/HW tradeoffs. At system level, the simulation models enable exploring system level feature for example: network caching and dynamic load balancing algorithms.
The activity is partitioned to two stages:
• Development of simulation models and infrastructure at device level and system level (e.g. Data Center). This includes traffic generators, abstract system nodes and specific device level mechanisms and features. C/C++ knowledge is an advantage but not mandatory.
• Architecture exploration which involves running regressions of different architecture options and parameters, analysis of simulation metrics leading to recommendations for the architecture.
The intern will develop simulation models at device level and system level based on tools like C++ and SystemC. The models will be used for architecture exploration. The definition might be in different levels of details – either as a fully detailed specification that needs implementation or at higher level problem statement that requires the candidate to develop a solution.
In any case – it is expected from the candidate to fully understand the architecture being explored and the results of the simulation in order to fix/improve the solution.
• We are developing innovative architectures that require deep architecture exploration.
• Simulation models are the main tools for exploring new architectures, validating them in context of the device level and at system level. At device level the simulations models provide means for analysis of Architectural and uArchitectural alternatives, SW/HW tradeoffs. At system level, the simulation models enable exploring system level feature for example: network caching and dynamic load balancing algorithms.
The activity is partitioned to two stages:
• Development of simulation models and infrastructure at device level and system level (e.g. Data Center). This includes traffic generators, abstract system nodes and specific device level mechanisms and features. C/C++ knowledge is an advantage but not mandatory.
• Architecture exploration which involves running regressions of different architecture options and parameters, analysis of simulation metrics leading to recommendations for the architecture.
The intern will develop simulation models at device level and system level based on tools like C++ and SystemC. The models will be used for architecture exploration. The definition might be in different levels of details – either as a fully detailed specification that needs implementation or at higher level problem statement that requires the candidate to develop a solution.
In any case – it is expected from the candidate to fully understand the architecture being explored and the results of the simulation in order to fix/improve the solution.
Job Requirements:Education: 3rd year student for BSC in electrical or computer engineering
Skills:
• Programming – Advantage
o C/C++, SystemC, Perl, Python scripting
• Knowledge - Advantage
o Computer architecture
o Networking
Skills:
• Programming – Advantage
o C/C++, SystemC, Perl, Python scripting
• Knowledge - Advantage
o Computer architecture
o Networking
Required Experience:ללא נסיון
Locations:מרכז, שרון, שפלה, ירושלים
Location:פ"ת
Sub Categories:סטודנטים - חומרה, מהנדס רכיבים VLSI, מהנדס / הנדסאי ASIC
Job Scopes:משרה מלאה
For more jobs and additional info about:Marvell
Senior Asic Verification Engineer
לפני 23 שעותשלח קורות חייםהוסף לסל
MarvellThe Switching team develops industry top technology switches.
Marvell Israel Switching team is searching for an ASIC Verification Engineer to join the Verification and Emulation team.
The team is responsible to build models, execute tests, run and debug them over emulation systems.
Work includes working with Software and Post Si teams.
Marvell Israel Switching team is searching for an ASIC Verification Engineer to join the Verification and Emulation team.
The team is responsible to build models, execute tests, run and debug them over emulation systems.
Work includes working with Software and Post Si teams.
Job Requirements:• B.Sc. in Computer Science / Computer Engineering or Electrical Engineering with at least 5 years’ experience.
• Experience in Verification
• Advantage: Experience in VLSI Design
• Advantage: Experience Emulation
• Advantage: Knowledge in networking
• Advantage: programming background C++, Perl, Python
Website: https://marvell.wd1.myworkdayjobs.com/en-US/MarvellCareers/job/Yokneam/Verification-leader_182822
• Experience in Verification
• Advantage: Experience in VLSI Design
• Advantage: Experience Emulation
• Advantage: Knowledge in networking
• Advantage: programming background C++, Perl, Python
Website: https://marvell.wd1.myworkdayjobs.com/en-US/MarvellCareers/job/Yokneam/Verification-leader_182822
Required Experience:5-6 שנים
Locations:מרכז, שרון, צפון, יהודה ושומרון
Location: More than one
Sub Categories:מהנדס / הנדסאי ASIC, מהנדס אלקטרוניקה, פיתוח חומרה
Job Scopes:משרה מלאה
For more jobs and additional info about:Marvell
Validation Engineer
06/12/2019שלח קורות חייםהוסף לסלFor more jobs and additional info about:Western Digital
Western DigitalContribute in setting up and enhancing the PCIe/NVME validation test environment
Create test plan, develop, execute and debug PCIE/NVME validation tests
Develop tests and drivers using C /Linux driver programming and execute them
Debug failures using protocol analyzers and oscilloscopes
Execute PCIE/NVME RTL level tests in simulation and in the FPGA environment
Working with external PCIE vendors to debug complex system level issues
Create test plan, develop, execute and debug PCIE/NVME validation tests
Develop tests and drivers using C /Linux driver programming and execute them
Debug failures using protocol analyzers and oscilloscopes
Execute PCIE/NVME RTL level tests in simulation and in the FPGA environment
Working with external PCIE vendors to debug complex system level issues
Job Requirements:Expert at an SoC level post-silicon validation and bring-up
SoC architectural level understanding is a must
Strong working knowledge with PCIe standard upto Gen3/4
Good understanding of processor architecture like ARM/ARC or similar
Good C programming experience
Good understanding in pre-silicon environments(Verification, Emulation, Bring-up)
Strong understanding and working knowledge in Linux PCIE/NVME Driver programming
Experience in any scripting languages such as Perl/Python/Bash etc.. is a plus
Strong debug skills using lab equipment like high-speed PCIe protocol analyzer and oscilloscopes
Excellent Debugging skills at SoC and System Level
Strong understanding and working knowledge in Linux PCIE/NVME Driver programming
Strong analytical skills
Ability to learn new and complex system and designs
Highly organized, able to prioritize and juggle multiple tasks
SoC architectural level understanding is a must
Strong working knowledge with PCIe standard upto Gen3/4
Good understanding of processor architecture like ARM/ARC or similar
Good C programming experience
Good understanding in pre-silicon environments(Verification, Emulation, Bring-up)
Strong understanding and working knowledge in Linux PCIE/NVME Driver programming
Experience in any scripting languages such as Perl/Python/Bash etc.. is a plus
Strong debug skills using lab equipment like high-speed PCIe protocol analyzer and oscilloscopes
Excellent Debugging skills at SoC and System Level
Strong understanding and working knowledge in Linux PCIE/NVME Driver programming
Strong analytical skills
Ability to learn new and complex system and designs
Highly organized, able to prioritize and juggle multiple tasks
Required Experience:3-4 שנים
Locations:שפלה, דרום
Location:עומר
Sub Categories:מהנדס / הנדסאי ASIC, וריפיקציה / ואלידציה, מהנדס אלקטרוניקה
Job Scopes:משרה מלאה
For more jobs and additional info about:Western DigitalSenior Digital Design Engineer & Micro Architect
05/12/2019שלח קורות חייםהוסף לסל
High Tech CompanyFor a hi-tech company developing products in the field of video imaging for mobile devices, with offices in the center we looking Senior Digital Design Engineer & Micro Architect.
What will you do?
· Building a generic & automated Design environment.
· Work closely with architecture & Verification teams.
· Define micro architecture and guide other designers.
· Initiate and implement flow and environment improvements to scale with growing project complexity.
· Work closely with Design teams to enable smooth execution and high quality. משרה 99668
What will you do?
· Building a generic & automated Design environment.
· Work closely with architecture & Verification teams.
· Define micro architecture and guide other designers.
· Initiate and implement flow and environment improvements to scale with growing project complexity.
· Work closely with Design teams to enable smooth execution and high quality. משרה 99668
Job Requirements:· BSc/ MSc in Electrical Engineering or Computer Science
· At least 5 years of experience as a Digital Designer
· Excellent communication and problem-solving skills
· Thinking out of the box - finding creative solutions for complicated tasks
· Vast knowledge in design and verification tools and methodologies
· Experience with System level design and architecture
· Experience with Verilog/ VHDL RTL coding
· Capable of taking responsibility for various VLSI tasks and bringing them to successful implementation.
· Experience in backend / circuit requirements
· Knowledge in Unix-based environments.
· Experience in AI Hardware Acceleration industry- Advantage
· Experience with Python- Advantage
· At least 5 years of experience as a Digital Designer
· Excellent communication and problem-solving skills
· Thinking out of the box - finding creative solutions for complicated tasks
· Vast knowledge in design and verification tools and methodologies
· Experience with System level design and architecture
· Experience with Verilog/ VHDL RTL coding
· Capable of taking responsibility for various VLSI tasks and bringing them to successful implementation.
· Experience in backend / circuit requirements
· Knowledge in Unix-based environments.
· Experience in AI Hardware Acceleration industry- Advantage
· Experience with Python- Advantage
Required Experience:5-6 שנים
Locations:מרכז, שרון
Location: More than one
Sub Categories:מהנדס / הנדסאי ASIC, מהנדס / הנדסאי FPGA, מהנדס Board Design
Job Scopes:משרה מלאה
Hardware Design & Verification
04/12/2019שלח קורות חייםהוסף לסל
קבוצת נישהלחברת סטארט אפ המפתחת שבב לבינה מלאכותית דרוש/ה FPGA Design
פיתוח צ'יפ למימוש AI
קידוד ב-Verilog, כולל ורפיציה, כתיבת סקריפטים ב-Pyton
פיתוח צ'יפ למימוש AI
קידוד ב-Verilog, כולל ורפיציה, כתיבת סקריפטים ב-Pyton
דרישות התפקיד:תואר BSC בהנדסת אלקטרוניקה/תוכנה
לפחות שנתיים ניסיון בפיתוח ASIC או FPGA - חובה
ניסיון בקידוד ב-Verilog/UVM - חובה
לפחות שנתיים ניסיון בפיתוח ASIC או FPGA - חובה
ניסיון בקידוד ב-Verilog/UVM - חובה
שנות נסיון:1-2 שנים
איזורים:שרון, צפון
מיקום המשרה:קיסריה
תחומים:מהנדס / הנדסאי ASIC, מהנדס / הנדסאי FPGA, מהנדס אלקטרוניקה
היקף המשרה:משרה מלאה
משרות נוספות וכל מה שצריך לדעת על:קבוצת נישה
Principal Systems Design Engineer
04/12/2019שלח קורות חייםהוסף לסלFor more jobs and additional info about:Western Digital
Western Digital- Designs and implements requirements for complex systems and subsystems.
- Collaborates with Firmware and ASIC personnel to explore performance and power trade-offs upon different use-cases and system conditions.
- Determines specs and working parameters for ASIC / FW compatibility.
- Coordinates design of subsystems and integration of the overall system.
- Identifies, analyzes and resolves product deficiencies.
- Responsibilities include analysis of new technologies, and drive of design decisions based on both empirical and theoretical data.
- Collaborates with Firmware and ASIC personnel to explore performance and power trade-offs upon different use-cases and system conditions.
- Determines specs and working parameters for ASIC / FW compatibility.
- Coordinates design of subsystems and integration of the overall system.
- Identifies, analyzes and resolves product deficiencies.
- Responsibilities include analysis of new technologies, and drive of design decisions based on both empirical and theoretical data.
Job Requirements:- B.Sc. or M.Sc. in Electrical / Computer Engineering.
- 7+ years of experience in an engineering development environment.
- Experience in Firmware or ASIC design – big advantage.
- Self-motivated and self-directed.
- Ability to achieve results in a fast moving, dynamic environment.
- Work effectively as a team member, both locally and across the organization.
- Ability to troubleshoot and analyze complex problems.
- Excellent communication (written and verbal) and interpersonal skills.
- Ability to travel.
- 7+ years of experience in an engineering development environment.
- Experience in Firmware or ASIC design – big advantage.
- Self-motivated and self-directed.
- Ability to achieve results in a fast moving, dynamic environment.
- Work effectively as a team member, both locally and across the organization.
- Ability to troubleshoot and analyze complex problems.
- Excellent communication (written and verbal) and interpersonal skills.
- Ability to travel.
Required Experience:7 שנים ומעלה
Locations:מרכז, שרון, שפלה, יהודה ושומרון
Location:כ"ס
Sub Categories:מהנדס מערכת, מהנדס / הנדסאי ASIC, מהנדס אלקטרוניקה
Job Scopes:משרה מלאה
For more jobs and additional info about:Western Digitalלחברת סטרטאפ מעניינת דרוש/ה מהנדס/ת FPGA
03/12/2019שלח קורות חייםהוסף לסל
- חסוי -לחב' סטרטאפ מעניינת דרוש/ה מהנדס/ת FPGA
דרישות התפקיד:תואר ראשון בהנדסת חשמל ואלקטרוניקה ממוסדות מוכרים -חובה.
3 שנות ניסיון ומעלה כמהנדס/ת FPGA /VLSI עם ניסיון ב - VERILOG - חובה.
3 שנות ניסיון ומעלה כמהנדס/ת FPGA /VLSI עם ניסיון ב - VERILOG - חובה.
שנות נסיון:3-4 שנים
איזורים:שרון, צפון
מיקום המשרה:קיסריה
תחומים:פיתוח חומרה, מהנדס / הנדסאי ASIC, מהנדס / הנדסאי FPGA
היקף המשרה:משרה מלאה
Verification Engineer - SoC group
03/12/2019שלח קורות חייםהוסף לסל
High Tech CompanyBe a significant part in a small team developing the System-On-Chip of cutting-edge IOT and AI products
Responsibilities:
Investigate, invent, develop, innovate and improve challenging verification environments, from block-level to chip-level.
Working with sophisticated verification methodologies implementing System On Chip flows.
Close collaboration with the Design team, and supporting SW and Production teams.
Acquiring thorough knowledge and understanding of cutting edge industry technology and standards in various fields (communications, processors, interconnect, …). משרה 99515
Responsibilities:
Investigate, invent, develop, innovate and improve challenging verification environments, from block-level to chip-level.
Working with sophisticated verification methodologies implementing System On Chip flows.
Close collaboration with the Design team, and supporting SW and Production teams.
Acquiring thorough knowledge and understanding of cutting edge industry technology and standards in various fields (communications, processors, interconnect, …). משרה 99515
Job Requirements:B.Sc. in Electrical or Computer Engineering/Computer science from an established university
At least 3 years of experience in the Verification flow of complex designs from test plan definition to coverage closure
Experience in Specman - an advantage
Experience in UVM - an advantage
Background in System-On-Chip flows and on-chip interconnect protocols - an advantage
At least 3 years of experience in the Verification flow of complex designs from test plan definition to coverage closure
Experience in Specman - an advantage
Experience in UVM - an advantage
Background in System-On-Chip flows and on-chip interconnect protocols - an advantage
Required Experience:3-4 שנים
Locations:מרכז, שרון, צפון
Location: More than one
Sub Categories:וריפיקציה / ואלידציה, מהנדס / הנדסאי ASIC
Job Scopes:משרה מלאה
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