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דרושים מהנדס / הנדסאי ASIC
מהנדס/ת FPGA/ ASIC
לפני 16 שעותהגש/י מועמדות
רפאלפיתוח תכן לוגי לרכיבי FPGA המתקדמים ביותר ללב המערכות של רפאל.
התפקיד כולל מימוש אלגוריתמי עיבוד אות בשיטות מתקדמות תכנון וישום תקשורות מהירות ובקרות מורכבות.
לשליחת קורות חיים: CV2@rafael.co.il
התפקיד כולל מימוש אלגוריתמי עיבוד אות בשיטות מתקדמות תכנון וישום תקשורות מהירות ובקרות מורכבות.
לשליחת קורות חיים: CV2@rafael.co.il
דרישות התפקיד:בוגרי תואר בהנדסת חשמל/ אלקטרוניקה/ הנדסת מחשבים BSc/MSc
ניסיון של שלוש שנים לפחות בפיתוח תכן לוגי – חובה (ASIC/FPGA)
הכרת שפות תיאור חומרה לעומק (VHDL/Verilog) חובה.
ניסיון של שלוש שנים לפחות בפיתוח תכן לוגי – חובה (ASIC/FPGA)
הכרת שפות תיאור חומרה לעומק (VHDL/Verilog) חובה.
שנות נסיון:3-4 שנים
איזורים:מרכז, שרון, צפון
תחומים:מהנדס / הנדסאי FPGA, מהנדס / הנדסאי ASIC, מהנדס אלקטרוניקה
היקף המשרה:משרה מלאה
למשרות נוספות:רפאל
Experienced FPGA Verification Engineer
לפני 17 שעותשלח קורות חייםהוסף לסל
Western Digital***Position can be located in Kfar Saba or Tefen site***
Tools group is responsible for developing FPGA based solutions to verify the memory
products of the company.
The group is looking for a talented, energetic engineer with high social, communicational and technical proven skills to work in a challenging multi-disciplined work environment.
Tools group is responsible for developing FPGA based solutions to verify the memory
products of the company.
The group is looking for a talented, energetic engineer with high social, communicational and technical proven skills to work in a challenging multi-disciplined work environment.
Job Requirements:B.A/BSc. or above in Electrical engineering / Software / equivalent
- 5+ years of experience with verification of FPGA/ASIC
- Knowledge of System Verilog
- Knowledge in architecture/coding of verification elements such as BFM / Monitors/ Drivers / Reference model etc…
- Knowledge of advanced verification methods UVM !!!
- Knowledge of Perl/Python – Advantage
- Knowledge of industry CAD simulators
o NCsim (Cadence)
o VCS (Synopsys)
o Questa (Mentor)
- 5+ years of experience with verification of FPGA/ASIC
- Knowledge of System Verilog
- Knowledge in architecture/coding of verification elements such as BFM / Monitors/ Drivers / Reference model etc…
- Knowledge of advanced verification methods UVM !!!
- Knowledge of Perl/Python – Advantage
- Knowledge of industry CAD simulators
o NCsim (Cadence)
o VCS (Synopsys)
o Questa (Mentor)
Required Experience:5-6 שנים
Locations:מרכז, שרון, שפלה, צפון
Sub Categories:מהנדס / הנדסאי ASIC, מהנדס / הנדסאי FPGA, וריפיקציה / ואלידציה
Job Scopes:משרה מלאה
Mandatory Requirements
המשרה ממוקמת בתפן (ליד כפר ורדים), האם המיקום רלוונטי עבורך?
שימו לב: לא ניתן לשלוח קורות חיים למשרה זו ללא אישור דרישות החובה
More Jobs:Western Digital
Senior ASIC Architect
לפני 18 שעותשלח קורות חייםהוסף לסל
MarvellJoin the Switching Architecture Group in leading research and definition of cutting edge products for Data Center, Carrier and Enterprise Networks
• Research new applications in the Ethernet Switching domain and define architecture to address them
• Process product requirements into detailed technical specifications
• Lead multi-discipline technology development projects that involve performance modeling, IP and SoC creation and system design
• Identify customer needs, market trends and follow standards bodies
Candidate will work in tight collaboration with Product Definition, CTO, SW Architects, IP/SoC R&D, Signal Integrity, HW development and Application Engineering teams to achieve his/her end-to-end goal of creating cutting edge Ethernet Switch products for the various markets and applications. Qualification:
• Research new applications in the Ethernet Switching domain and define architecture to address them
• Process product requirements into detailed technical specifications
• Lead multi-discipline technology development projects that involve performance modeling, IP and SoC creation and system design
• Identify customer needs, market trends and follow standards bodies
Candidate will work in tight collaboration with Product Definition, CTO, SW Architects, IP/SoC R&D, Signal Integrity, HW development and Application Engineering teams to achieve his/her end-to-end goal of creating cutting edge Ethernet Switch products for the various markets and applications. Qualification:
Job Requirements:BSc. in Communication Engineering, Computer Science, Electrical Engineering
• 7+ years of experience working as engineer in networking and embedded systems
• 3+ years of experience as an ASIC / System architect in communication and networking field • Background in designing architectures for networking systems
• Background in networks, protocols (e.g. Ethernet, IP Routing, TCP/UDP) and SoC architectures
• Proven experience in defining requirements and architectures for advanced high-end communication systems
• Previous experience in Ethernet Switch and Networking Protocols – Advantage
• Strong learning abilities, independent, motivated and self-driven
• Leadership skills with good interpersonal and communication skills
• Strong written and verbal communication skills in English
• 7+ years of experience working as engineer in networking and embedded systems
• 3+ years of experience as an ASIC / System architect in communication and networking field • Background in designing architectures for networking systems
• Background in networks, protocols (e.g. Ethernet, IP Routing, TCP/UDP) and SoC architectures
• Proven experience in defining requirements and architectures for advanced high-end communication systems
• Previous experience in Ethernet Switch and Networking Protocols – Advantage
• Strong learning abilities, independent, motivated and self-driven
• Leadership skills with good interpersonal and communication skills
• Strong written and verbal communication skills in English
Required Experience:3-4 שנים
Locations:מרכז, שרון, צפון, יהודה ושומרון
Sub Categories:מהנדס / הנדסאי ASIC, מהנדס אלקטרוניקה, מהנדס מערכת
Job Scopes:משרה מלאה
More Jobs:Marvell
VLSI Engineer - Student position
לפני 18 שעותשלח קורות חייםהוסף לסל
סרגון נטוורקס• Join Ceragon ASIC team, in developing next generation backhaul communication systems.
• In this roll you will be required for:
o aspects of ASIC design activity: Coding, verification support.
o Participate in System definitions for current and next generation products.
o Collaborate with other teams: SW, Algorithm, System.
• In this roll you will be required for:
o aspects of ASIC design activity: Coding, verification support.
o Participate in System definitions for current and next generation products.
o Collaborate with other teams: SW, Algorithm, System.
Job Requirements:• Student in third year of BSC degree from leading university (BGU/TLV/Technion).
• Experience with networking – advantage.
• Experience with UVM verification flow – advantage.
• Team player.
• High motivation to excel.
• Experience with networking – advantage.
• Experience with UVM verification flow – advantage.
• Team player.
• High motivation to excel.
Required Experience:ללא נסיון
Locations:מרכז, שרון, שפלה
Sub Categories:סטודנטים - חומרה, מהנדס רכיבים VLSI, מהנדס / הנדסאי ASIC
Job Scopes:משרה חלקית
More Jobs:סרגון נטוורקס
VLSI/ASIC Design Engineer
לפני 19 שעותשלח קורות חייםהוסף לסל
MarvellMember of the design team that is responsible for developing complex, state of the art high-speed Ethernet controller chips.
The candidate will own tasks such as micro-architecture, design, integration and other tasks as part of the chip development and testing processes.Member of the design team that is responsible for developing complex, state of the art high-speed Ethernet controller chips.
The candidate will own tasks such as micro-architecture, design, integration and other tasks as part of the chip development and testing processes
The candidate will own tasks such as micro-architecture, design, integration and other tasks as part of the chip development and testing processes.Member of the design team that is responsible for developing complex, state of the art high-speed Ethernet controller chips.
The candidate will own tasks such as micro-architecture, design, integration and other tasks as part of the chip development and testing processes
Job Requirements:Must have:
· BSc. / MSc. university degree in EE/CS, graduation with honors.
· 5+ years of experience in VLSI design.
· Deep knowledge in Verilog.
· Experience in micro-architecture and design of complex blocks.
· Familiar with the verification process of a block (test plan, coverage, etc.).
· Excellent communication skills in English (written and verbal).
Not a must, but an advantage:
· Knowledge in networking and networking chips.
· Experience with multi-clock domain designs.
· Script knowledge (TCL, perl, etc.).
· Understanding the timing closure process (synthesis/STA).
· Understanding DFT.
Understanding the entire chip development flow
· BSc. / MSc. university degree in EE/CS, graduation with honors.
· 5+ years of experience in VLSI design.
· Deep knowledge in Verilog.
· Experience in micro-architecture and design of complex blocks.
· Familiar with the verification process of a block (test plan, coverage, etc.).
· Excellent communication skills in English (written and verbal).
Not a must, but an advantage:
· Knowledge in networking and networking chips.
· Experience with multi-clock domain designs.
· Script knowledge (TCL, perl, etc.).
· Understanding the timing closure process (synthesis/STA).
· Understanding DFT.
Understanding the entire chip development flow
Required Experience:3-4 שנים
Locations:מרכז, שרון
Sub Categories:מהנדס / הנדסאי ASIC, מהנדס Board Design, מהנדס רכיבים VLSI
Job Scopes:משרה מלאה
More Jobs:Marvell
ASIC Design Engineer
21/05/2019שלח קורות חייםהוסף לסל
High Tech CompanyFor a hi-tech company developing products in the field of storage, with offices in the Sharon.
- Interact closely with design team.
- Create, define and develop stand-alone verification environments for digital IPs and test suites.
- Responsible for the planning, development and debugging of UVM test environment using SystemVerilog language, test sequences and directed tests.
- Develop test bench components like monitors, checkers, score-boards and bus functional models (BFMs).
- Run test regressions and debug failing tests to isolate and root cause failures.
- Report status to project leads. Drive resolution of issues with development teams quickly. משרה 93823
- Interact closely with design team.
- Create, define and develop stand-alone verification environments for digital IPs and test suites.
- Responsible for the planning, development and debugging of UVM test environment using SystemVerilog language, test sequences and directed tests.
- Develop test bench components like monitors, checkers, score-boards and bus functional models (BFMs).
- Run test regressions and debug failing tests to isolate and root cause failures.
- Report status to project leads. Drive resolution of issues with development teams quickly. משרה 93823
Job Requirements:Ability to work in a group, or alone. Flexible and willing to shift based on changing priorities.
At least 7 years of experience required, working at least 5 years with UVM.
The employee will develop and verification on multiple IPs using UVM.
Ability to work in a group, or alone. Flexible and willing to shift based on changing priorities.
at least 7 years of experience required, working at least 3 years with UVM.
Knowledge with NVMe, PCIe, DDR, Flash - a plus
At least 7 years of experience required, working at least 5 years with UVM.
The employee will develop and verification on multiple IPs using UVM.
Ability to work in a group, or alone. Flexible and willing to shift based on changing priorities.
at least 7 years of experience required, working at least 3 years with UVM.
Knowledge with NVMe, PCIe, DDR, Flash - a plus
Required Experience:7 שנים ומעלה
Locations:מרכז, שרון, צפון
Sub Categories:מהנדס / הנדסאי ASIC, מהנדס רכיבים VLSI
Job Scopes:משרה מלאה
ASIC Design Engineer
20/05/2019שלח קורות חייםהוסף לסל
Western DigitalThe candidate will be part of the coverage-driven verification team working on the next generation SSD product.
can be located in Omer or Kfar-Saba site ***
Candidate responsibilities include the following:
- Interact closely with the design team.
- Create, define and develop stand-alone verification environments for digital IPs and test suites.
- Responsible for the planning, development and debugging of UVM test environment using SystemVerilog language, test sequences, and directed tests.
- Develop test bench components like monitors, checkers, score-boards and bus functional models (BFMs).
- Run test regressions and debug failing tests to isolate and root cause failures.
- Report status to project leads. Drive resolution of issues with development teams quickly.
The candidate should exhibit:
- Ability to work independently and in a team
- Set aggressive goals and meet the commitments
- Exhibit excellent communication skills
can be located in Omer or Kfar-Saba site ***
Candidate responsibilities include the following:
- Interact closely with the design team.
- Create, define and develop stand-alone verification environments for digital IPs and test suites.
- Responsible for the planning, development and debugging of UVM test environment using SystemVerilog language, test sequences, and directed tests.
- Develop test bench components like monitors, checkers, score-boards and bus functional models (BFMs).
- Run test regressions and debug failing tests to isolate and root cause failures.
- Report status to project leads. Drive resolution of issues with development teams quickly.
The candidate should exhibit:
- Ability to work independently and in a team
- Set aggressive goals and meet the commitments
- Exhibit excellent communication skills
Job Requirements:Ability to work in a group, or alone. Flexible and willing to shift based on changing priorities.
At least 7 years of experience required, working at least 5 years with UVM.
The employee will develop and verification of multiple IPs using UVM.
Ability to work in a group, or alone. Flexible and willing to shift based on changing priorities.
Knowledge with NVMe, PCIe, DDR, Flash - a plus
At least 7 years of experience required, working at least 5 years with UVM.
The employee will develop and verification of multiple IPs using UVM.
Ability to work in a group, or alone. Flexible and willing to shift based on changing priorities.
Knowledge with NVMe, PCIe, DDR, Flash - a plus
Required Experience:7 שנים ומעלה
Locations:מרכז, שרון, דרום
Sub Categories:מהנדס / הנדסאי ASIC, וריפיקציה / ואלידציה
Job Scopes:משרה מלאה
More Jobs:Western Digital
HW VERIFICATION ENGINEER
20/05/2019שלח קורות חייםהוסף לסל
High Tech CompanyVLSI group is looking to hire a motivated HW Verification Engineer to join us in Tel Aviv. In this role, you will take a significant part in developing our next AI chip. The role includes verification of AI components and SoC, infrastructure development and integration of VIPs. If you want to be a part of the AI revolution in VLSI and Verification, let’s meet! משרה 98009
Job Requirements:B.Sc. in Computer science or Electrical Engineering
3+ years of experience in HW Verification
Fluency in English and Hebrew
Team player
Advantages
Experience with system Verilog
Experience with SoC IPs and VIPs integration and verification
Quick learner and hands-on
3+ years of experience in HW Verification
Fluency in English and Hebrew
Team player
Advantages
Experience with system Verilog
Experience with SoC IPs and VIPs integration and verification
Quick learner and hands-on
Required Experience:1-2 שנים
Locations:מרכז, שרון
Sub Categories:וריפיקציה / ואלידציה, מהנדס / הנדסאי ASIC
Job Scopes:משרה מלאה
Senior VLSI Engineer
20/05/2019שלח קורות חייםהוסף לסל
High Tech CompanyFor a hi-tech company developing products in the field of microelectronics, with offices in the Sharon משרה 70781
Job Requirements:B.Sc. / B.S.E.E. or M.Sc. /M.S.E.E. from a recognized university
At least 3 years experience in hardware development
Experienced with architecture design, preparing specifications, documentation and Verilog / VHDL coding
Knowledge of USB, DDR2/3 and modem PHY designs - an advantage
Ability to lead small teams
At least 3 years experience in hardware development
Experienced with architecture design, preparing specifications, documentation and Verilog / VHDL coding
Knowledge of USB, DDR2/3 and modem PHY designs - an advantage
Ability to lead small teams
Required Experience:3-4 שנים
Locations:מרכז, שרון, צפון
Sub Categories:מהנדס / הנדסאי ASIC, מהנדס רכיבים VLSI
Job Scopes:משרה מלאה
VLSI Digital Design Engineer
20/05/2019שלח קורות חייםהוסף לסל
High Tech CompanyFor a hi-tech company developing products in the field of video imaging for mobile devices, with offices in the center
To join a dynamic team that provides continuous opportunities for learning and growth where you will participate in the design and development of state-of-the-art flash solution IPs from early stages of architecture definition, through RTL implementation and all the way to Tapeout, working closely with algorithm engineers and being immersed in a "critical mass" of innovative and top caliber memory experts solving incredibly hard problems in signal processing and memory architecture that are of value in the real world, thereby creating world-class memory products in a collegial and fun environment משרה 85013
To join a dynamic team that provides continuous opportunities for learning and growth where you will participate in the design and development of state-of-the-art flash solution IPs from early stages of architecture definition, through RTL implementation and all the way to Tapeout, working closely with algorithm engineers and being immersed in a "critical mass" of innovative and top caliber memory experts solving incredibly hard problems in signal processing and memory architecture that are of value in the real world, thereby creating world-class memory products in a collegial and fun environment משרה 85013
Job Requirements:B.Sc. in Electrical Engineering
At least 3 years of hands-on experience in VLSI design
Familiar with low-power designs - an advantage
Familiar with scripting languages - an advantage
At least 3 years of hands-on experience in VLSI design
Familiar with low-power designs - an advantage
Familiar with scripting languages - an advantage
Required Experience:3-4 שנים
Locations:מרכז, שרון
Sub Categories:מהנדס / הנדסאי ASIC, מהנדס רכיבים VLSI
Job Scopes:משרה מלאה
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