Responsibilities:
- Develop and execute verification plans for complex network and Ethernet-based designs.
- Create and maintain verification environments using advanced methodologies.
- Perform functional simulation, debugging, and verification coverage analysis to ensure high-quality design delivery.
- Collaborate with system, architecture, and design teams to define verification strategies.
Requirements:
- 5+ years of experience as a Verification Engineer.
- Experience with networking protocols, specifically Ethernet – Must.
- Strong experience with Specman (preferred) OR SystemVerilog / UVM.
* משרה זו פונה לנשים וגברים כאחד.