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דרושים מהנדס רכיבים VLSI
System Validation Engineer
לפני 14 שעותשלח קורות חייםהוסף לסל
DSP GroupSystem Validation Engineer
Job Description:
The System Validation Engineer will join our validation team that handles our next generation Pre/Post Silicon and System Validation activities in order to support integration, debugging and optimization testing for the entire set of products.
In this role you will:
- Create, define and develop test plans for module and system level
- Responsible for tests setups, execution of validation plans and failures debug
- Develop test automation using python
- Work in a matrix organization in close collaboration with all disciplines (Architecture, Design, System, SW)
Job Description:
The System Validation Engineer will join our validation team that handles our next generation Pre/Post Silicon and System Validation activities in order to support integration, debugging and optimization testing for the entire set of products.
In this role you will:
- Create, define and develop test plans for module and system level
- Responsible for tests setups, execution of validation plans and failures debug
- Develop test automation using python
- Work in a matrix organization in close collaboration with all disciplines (Architecture, Design, System, SW)
Job Requirements:BSc in Electrical / Computer Engineering or equivalent
At least 3 years industry relevant work experience
Hands-on experience and familiarity with lab tools such as Logic Analyzer, Power Analyzer, Scope etc.
Script writing skills in Python. C/ C#.Net - an advantage
Previous experience in HW-SW integration and develop tests
Understanding of system areas and interfaces with Architecture, Design and Pre/Post-silicon Validation
Ability to troubleshoot complex problems
Strong analytical/critical thinking skills
Strong Interpersonal, teamwork, process development skills
At least 3 years industry relevant work experience
Hands-on experience and familiarity with lab tools such as Logic Analyzer, Power Analyzer, Scope etc.
Script writing skills in Python. C/ C#.Net - an advantage
Previous experience in HW-SW integration and develop tests
Understanding of system areas and interfaces with Architecture, Design and Pre/Post-silicon Validation
Ability to troubleshoot complex problems
Strong analytical/critical thinking skills
Strong Interpersonal, teamwork, process development skills
Required Experience:1-2 שנים
Locations:מרכז, שרון
Sub Categories:מהנדס רכיבים VLSI, הנדסאי אלקטרוניקה, וריפיקציה / ואלידציה
Job Scopes:משרה מלאה
More Jobs:DSP Group
VLSI Engineer - Student position
לפני 18 שעותשלח קורות חייםהוסף לסל
סרגון נטוורקס• Join Ceragon ASIC team, in developing next generation backhaul communication systems.
• In this roll you will be required for:
o aspects of ASIC design activity: Coding, verification support.
o Participate in System definitions for current and next generation products.
o Collaborate with other teams: SW, Algorithm, System.
• In this roll you will be required for:
o aspects of ASIC design activity: Coding, verification support.
o Participate in System definitions for current and next generation products.
o Collaborate with other teams: SW, Algorithm, System.
Job Requirements:• Student in third year of BSC degree from leading university (BGU/TLV/Technion).
• Experience with networking – advantage.
• Experience with UVM verification flow – advantage.
• Team player.
• High motivation to excel.
• Experience with networking – advantage.
• Experience with UVM verification flow – advantage.
• Team player.
• High motivation to excel.
Required Experience:ללא נסיון
Locations:מרכז, שרון, שפלה
Sub Categories:סטודנטים - חומרה, מהנדס רכיבים VLSI, מהנדס / הנדסאי ASIC
Job Scopes:משרה חלקית
More Jobs:סרגון נטוורקס
VLSI/ASIC Design Engineer
לפני 18 שעותשלח קורות חייםהוסף לסל
MarvellMember of the design team that is responsible for developing complex, state of the art high-speed Ethernet controller chips.
The candidate will own tasks such as micro-architecture, design, integration and other tasks as part of the chip development and testing processes.Member of the design team that is responsible for developing complex, state of the art high-speed Ethernet controller chips.
The candidate will own tasks such as micro-architecture, design, integration and other tasks as part of the chip development and testing processes
The candidate will own tasks such as micro-architecture, design, integration and other tasks as part of the chip development and testing processes.Member of the design team that is responsible for developing complex, state of the art high-speed Ethernet controller chips.
The candidate will own tasks such as micro-architecture, design, integration and other tasks as part of the chip development and testing processes
Job Requirements:Must have:
· BSc. / MSc. university degree in EE/CS, graduation with honors.
· 5+ years of experience in VLSI design.
· Deep knowledge in Verilog.
· Experience in micro-architecture and design of complex blocks.
· Familiar with the verification process of a block (test plan, coverage, etc.).
· Excellent communication skills in English (written and verbal).
Not a must, but an advantage:
· Knowledge in networking and networking chips.
· Experience with multi-clock domain designs.
· Script knowledge (TCL, perl, etc.).
· Understanding the timing closure process (synthesis/STA).
· Understanding DFT.
Understanding the entire chip development flow
· BSc. / MSc. university degree in EE/CS, graduation with honors.
· 5+ years of experience in VLSI design.
· Deep knowledge in Verilog.
· Experience in micro-architecture and design of complex blocks.
· Familiar with the verification process of a block (test plan, coverage, etc.).
· Excellent communication skills in English (written and verbal).
Not a must, but an advantage:
· Knowledge in networking and networking chips.
· Experience with multi-clock domain designs.
· Script knowledge (TCL, perl, etc.).
· Understanding the timing closure process (synthesis/STA).
· Understanding DFT.
Understanding the entire chip development flow
Required Experience:3-4 שנים
Locations:מרכז, שרון
Sub Categories:מהנדס / הנדסאי ASIC, מהנדס Board Design, מהנדס רכיבים VLSI
Job Scopes:משרה מלאה
More Jobs:Marvell
Design and verification team manager
לפני 18 שעותשלח קורות חייםהוסף לסל
MarvellA Team Leader in the Switch IP department manages 2-6 engineers, including their task allocations, schedule, work effectiveness, acquiring technical skills, career development, and more.
The team leader manages several units or cluster, with good knowledge of the architecture, responsible for choosing correct architecture solutions, planning micro-arch, managing implementation of design and verification environment, managing and responsible for the full development flow and manage external interfaces.
The team leader is responsible for the team schedule and meeting quality for the different project milestones.
The team leader manages several units or cluster, with good knowledge of the architecture, responsible for choosing correct architecture solutions, planning micro-arch, managing implementation of design and verification environment, managing and responsible for the full development flow and manage external interfaces.
The team leader is responsible for the team schedule and meeting quality for the different project milestones.
Job Requirements:Required skills and experience:
- 8+ years’ experience in VLSI development
- Hands-on experience in design and verification
- Team management experience
- Excellent personal skills
- Visionary and strategic
- High motivation and desire to influence
- 8+ years’ experience in VLSI development
- Hands-on experience in design and verification
- Team management experience
- Excellent personal skills
- Visionary and strategic
- High motivation and desire to influence
Required Experience:7 שנים ומעלה
Locations:מרכז, שרון, שפלה, צפון
Sub Categories:מהנדס רכיבים VLSI, חומרה - ניהול, ראש צוות חומרה
Job Scopes:משרה מלאה
More Jobs:Marvell
Chip design engineer
לפני 18 שעותשלח קורות חייםהוסף לסל
MarvellJoin a Highly skilled, energetic team developing the next generation high - end Embedded SOCs and Communication SOCs for the networking industry.
As design engineer in the team, you will have close interfaces with design and verification engineers within the team and with group’s design, verification and architecture teams.
You will be responsible for defining micro architecture for blocks, implementing the design in RTL, debug failing tests and resolve bugs, optimizing the design for performance, power and area and design sign off – passing LINT and meeting timing
As design engineer in the team, you will have close interfaces with design and verification engineers within the team and with group’s design, verification and architecture teams.
You will be responsible for defining micro architecture for blocks, implementing the design in RTL, debug failing tests and resolve bugs, optimizing the design for performance, power and area and design sign off – passing LINT and meeting timing
Job Requirements:Must have:
BSc. / MSc. university degree in EE/CS, graduation with honors.
5+ years of experience in VLSI design.
Deep knowledge in Verilog.
Experience in micro-architecture and design of complex blocks.
Familiar with the verification process of a block (test plan, coverage, etc.).
Excellent communication skills in English (written and verbal).
Not a must, but an advantage:
Knowledge in networking and networking chips.
Experience with multi-clock domain designs.
Script knowledge (TCL, perl, etc.).
Understanding the timing closure process (synthesis/STA).
Understanding DFT.
BSc. / MSc. university degree in EE/CS, graduation with honors.
5+ years of experience in VLSI design.
Deep knowledge in Verilog.
Experience in micro-architecture and design of complex blocks.
Familiar with the verification process of a block (test plan, coverage, etc.).
Excellent communication skills in English (written and verbal).
Not a must, but an advantage:
Knowledge in networking and networking chips.
Experience with multi-clock domain designs.
Script knowledge (TCL, perl, etc.).
Understanding the timing closure process (synthesis/STA).
Understanding DFT.
Required Experience:3-4 שנים
Locations:מרכז, שרון, שפלה
Sub Categories:מהנדס רכיבים VLSI, מהנדס אלקטרוניקה, פיתוח חומרה
Job Scopes:משרה מלאה
More Jobs:Marvell
ASIC Design Engineer
21/05/2019שלח קורות חייםהוסף לסל
High Tech CompanyFor a hi-tech company developing products in the field of storage, with offices in the Sharon.
- Interact closely with design team.
- Create, define and develop stand-alone verification environments for digital IPs and test suites.
- Responsible for the planning, development and debugging of UVM test environment using SystemVerilog language, test sequences and directed tests.
- Develop test bench components like monitors, checkers, score-boards and bus functional models (BFMs).
- Run test regressions and debug failing tests to isolate and root cause failures.
- Report status to project leads. Drive resolution of issues with development teams quickly. משרה 93823
- Interact closely with design team.
- Create, define and develop stand-alone verification environments for digital IPs and test suites.
- Responsible for the planning, development and debugging of UVM test environment using SystemVerilog language, test sequences and directed tests.
- Develop test bench components like monitors, checkers, score-boards and bus functional models (BFMs).
- Run test regressions and debug failing tests to isolate and root cause failures.
- Report status to project leads. Drive resolution of issues with development teams quickly. משרה 93823
Job Requirements:Ability to work in a group, or alone. Flexible and willing to shift based on changing priorities.
At least 7 years of experience required, working at least 5 years with UVM.
The employee will develop and verification on multiple IPs using UVM.
Ability to work in a group, or alone. Flexible and willing to shift based on changing priorities.
at least 7 years of experience required, working at least 3 years with UVM.
Knowledge with NVMe, PCIe, DDR, Flash - a plus
At least 7 years of experience required, working at least 5 years with UVM.
The employee will develop and verification on multiple IPs using UVM.
Ability to work in a group, or alone. Flexible and willing to shift based on changing priorities.
at least 7 years of experience required, working at least 3 years with UVM.
Knowledge with NVMe, PCIe, DDR, Flash - a plus
Required Experience:7 שנים ומעלה
Locations:מרכז, שרון, צפון
Sub Categories:מהנדס / הנדסאי ASIC, מהנדס רכיבים VLSI
Job Scopes:משרה מלאה
Board Designer
21/05/2019שלח קורות חייםהוסף לסל
SQLinkלחברה יציבה ומובילה המפתחת מערכות אלקטרואופטיות מורכבות דרוש/ה Board Designer לפיתוח כרטיסים במהירויות גבוהות.
עבודה עם Signal integrity, אחריות על פיתוח הכרטיס מאפס כולל ליווי עריכה ועד להעברה לייצור.
אופציות קידום רבות ותנאים מעולים!
עבודה עם Signal integrity, אחריות על פיתוח הכרטיס מאפס כולל ליווי עריכה ועד להעברה לייצור.
אופציות קידום רבות ותנאים מעולים!
דרישות התפקיד:תואר ראשון רלוונטי - חשמל ואלקטרוניקה - הכרחי
לפחות 3-5 שנות ניסיון פיתוח כרטיסים אלקטרוניים בסביבה מולטי-דיסציפלינרית (HW ו- SW)
ניסיון מוכח ב high speed, signal integrity, layout-חובה
ניסיון בסביבת רכיבי FPGA, CPU, DDR3/4
מוכנת לעבודה חוץ משרדית- יציאה לניסויי שטח
לפחות 3-5 שנות ניסיון פיתוח כרטיסים אלקטרוניים בסביבה מולטי-דיסציפלינרית (HW ו- SW)
ניסיון מוכח ב high speed, signal integrity, layout-חובה
ניסיון בסביבת רכיבי FPGA, CPU, DDR3/4
מוכנת לעבודה חוץ משרדית- יציאה לניסויי שטח
שנות נסיון:3-4 שנים
איזורים:מרכז, שרון
תחומים:מהנדס רכיבים VLSI, מהנדס / הנדסאי FPGA, מהנדס Board Design
היקף המשרה:משרה מלאה
למשרות נוספות:SQLink
Senior VLSI Engineer
20/05/2019שלח קורות חייםהוסף לסל
High Tech CompanyFor a hi-tech company developing products in the field of microelectronics, with offices in the Sharon משרה 70781
Job Requirements:B.Sc. / B.S.E.E. or M.Sc. /M.S.E.E. from a recognized university
At least 3 years experience in hardware development
Experienced with architecture design, preparing specifications, documentation and Verilog / VHDL coding
Knowledge of USB, DDR2/3 and modem PHY designs - an advantage
Ability to lead small teams
At least 3 years experience in hardware development
Experienced with architecture design, preparing specifications, documentation and Verilog / VHDL coding
Knowledge of USB, DDR2/3 and modem PHY designs - an advantage
Ability to lead small teams
Required Experience:3-4 שנים
Locations:מרכז, שרון, צפון
Sub Categories:מהנדס / הנדסאי ASIC, מהנדס רכיבים VLSI
Job Scopes:משרה מלאה
VLSI Digital Design Engineer
20/05/2019שלח קורות חייםהוסף לסל
High Tech CompanyFor a hi-tech company developing products in the field of video imaging for mobile devices, with offices in the center
To join a dynamic team that provides continuous opportunities for learning and growth where you will participate in the design and development of state-of-the-art flash solution IPs from early stages of architecture definition, through RTL implementation and all the way to Tapeout, working closely with algorithm engineers and being immersed in a "critical mass" of innovative and top caliber memory experts solving incredibly hard problems in signal processing and memory architecture that are of value in the real world, thereby creating world-class memory products in a collegial and fun environment משרה 85013
To join a dynamic team that provides continuous opportunities for learning and growth where you will participate in the design and development of state-of-the-art flash solution IPs from early stages of architecture definition, through RTL implementation and all the way to Tapeout, working closely with algorithm engineers and being immersed in a "critical mass" of innovative and top caliber memory experts solving incredibly hard problems in signal processing and memory architecture that are of value in the real world, thereby creating world-class memory products in a collegial and fun environment משרה 85013
Job Requirements:B.Sc. in Electrical Engineering
At least 3 years of hands-on experience in VLSI design
Familiar with low-power designs - an advantage
Familiar with scripting languages - an advantage
At least 3 years of hands-on experience in VLSI design
Familiar with low-power designs - an advantage
Familiar with scripting languages - an advantage
Required Experience:3-4 שנים
Locations:מרכז, שרון
Sub Categories:מהנדס / הנדסאי ASIC, מהנדס רכיבים VLSI
Job Scopes:משרה מלאה
Experienced FPGA Engineer
19/05/2019שלח קורות חייםהוסף לסל
Western Digital***Position can be located in Kfar Saba or Tefen site***
The Validation Host Solution (VHS) team is developing a wide range of FPGA solution for
post silicon validation for memory devices across Western Digital.
The team is looking for a talented, energetic FPGA engineer with communication capabilities and proven ability to design complex logical blocks in a multi-disciplinary environment with a variety of interfaces.
The Validation Host Solution (VHS) team is developing a wide range of FPGA solution for
post silicon validation for memory devices across Western Digital.
The team is looking for a talented, energetic FPGA engineer with communication capabilities and proven ability to design complex logical blocks in a multi-disciplinary environment with a variety of interfaces.
Job Requirements:Requirement
First or Second degree in EE, CE or equivalent
At least 5 years of experience in RTL logic design
Experience with Xilinx - Advantage
Experience & Knowledge with System Verilog - Strong Advantage
Knowledge in synthesis and timing analysis - Advantage
Experience in multi clock and high frequencies designs - Advantage
Experience in standard protocols such PCIe, UFS and DDR3 – advantage
Deep knowledge of the following tools:
ISE/Vivado – advantage
NCSim – advantage
Synplify
Knowledge with Perl/python – advantage
Knowledge simulation environment System Verilog based – advantage
Experience in board design would be an added advantage
Additional qualifications include:
Also:
Good communication and/or interaction skills among groups inside and outside of Israel
Ability to communicate multiple interfaces inside the company
Innovation capabilities
Team worker
First or Second degree in EE, CE or equivalent
At least 5 years of experience in RTL logic design
Experience with Xilinx - Advantage
Experience & Knowledge with System Verilog - Strong Advantage
Knowledge in synthesis and timing analysis - Advantage
Experience in multi clock and high frequencies designs - Advantage
Experience in standard protocols such PCIe, UFS and DDR3 – advantage
Deep knowledge of the following tools:
ISE/Vivado – advantage
NCSim – advantage
Synplify
Knowledge with Perl/python – advantage
Knowledge simulation environment System Verilog based – advantage
Experience in board design would be an added advantage
Additional qualifications include:
Also:
Good communication and/or interaction skills among groups inside and outside of Israel
Ability to communicate multiple interfaces inside the company
Innovation capabilities
Team worker
Required Experience:5-6 שנים
Locations:מרכז, שרון, צפון
Sub Categories:מהנדס רכיבים VLSI, מהנדס / הנדסאי ASIC, מהנדס / הנדסאי FPGA
Job Scopes:משרה מלאה
Mandatory Requirements
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שימו לב: לא ניתן לשלוח קורות חיים למשרה זו ללא אישור דרישות החובה
More Jobs:Western Digital
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